HVM guest I/O port accesses are subject to either emulation or at least
translation. Translations are managed by the device model (via
XEN_DOMCTL_ioport_mapping), and hence the linked list used may changed
at any time. Traversal of those lists (while handling guest I/O port
accesses) therefore needs synchronizing with updates, which was missing
so far.
Metrics
Affected Vendors & Products
References
| Link | Providers |
|---|---|
| https://xenbits.xenproject.org/xsa/advisory-491.html |
|
History
Thu, 18 Jun 2026 16:45:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Description | HVM guest I/O port accesses are subject to either emulation or at least translation. Translations are managed by the device model (via XEN_DOMCTL_ioport_mapping), and hence the linked list used may changed at any time. Traversal of those lists (while handling guest I/O port accesses) therefore needs synchronizing with updates, which was missing so far. | |
| Title | x86 HVM I/O port list traversal | |
| Weaknesses | CWE-362 | |
| References |
| |
| Metrics |
cvssV3_1
|
Status: PUBLISHED
Assigner: XEN
Published:
Updated: 2026-06-18T15:07:31.335Z
Reserved: 2026-04-27T14:20:24.138Z
Link: CVE-2026-42487
Updated: 2026-06-18T15:07:31.335Z
No data.
No data.
OpenCVE Enrichment
No data.